The present invention relates to a semiconductor memory circuit and, more particularly, to a semiconductor memory circuit equipped with a sense amplifier for amplifying signals between bit lines.
A conventional semiconductor memory circuit of the kind to which the invention relates may be found, for example, in Digest of Technical Papers of 1989 International Solid State Circuit Conference (ISSCC), page 246 which discloses a circuit of latch sense type.
An example of such conventional circuit is one on which a circuit of the above latch sense type is applied to a dynamic random access memory (DRAM) and which includes a plurality of memory cells, each memory cell being of an ordinary type having one transistor and one capacitor. That is, the type in which there is a switching transistor between a capacitor for storing charge and a bit line. There are problem in such a conventional circuit in that, when a transfer signal changes from its high level to its low level thereby causing transfer gates to become non-conductive, the effective read-out voltage inevitably becomes small due to the coupling noise occurring between the gate capacitances of these transfer gates and parasitic capacitances. The details of such a conventional circuit and the problems therein will fully be explained later.